1. Field of the Invention
The present invention relates generally to differential amplifiers and more particularly to open-loop differential amplifiers.
2. Description of the Related Art
A differential amplifier is one whose output is proportional to the difference between two input signals. The input port of differential amplifiers is typically arranged to respond to signal differences and to suppress signals that are common to the inputs. Differential amplifiers are widely used in linear integrated circuits, e.g., they are a fundamental component of operational amplifiers. A basic building block of differential amplifiers is the differential pair; a pair of transistors whose emitters (sources) are coupled to a current source and whose bases (gates) form an input port. The difference in voltage at the input port steers the current of the current source between the collectors (drains).
FIG. 1A illustrates a typical differential amplifier 20 having a differential pair 21 of bipolar junction transistors 22 and 23. The emitters of the differential pair 21 have their emitters respectively coupled through source resistors 24 and 25 to a current source 26. The source resistors each have a resistance value of R.sub.E. The collectors of the transistors are coupled to a supply voltage V+ by collector load resistors 27 and 28 which each have a resistance value of R.sub.C. The base leads of the two transistors form a differential input port 32 and leads from their collectors form a differential output port 34. The differential voltage gain from input port 30 to output port 32 is given by an approximate gain expression of R.sub.C / R.sub.E.
This approximate gain expression ignores the effects of various transistor parameters which include the small-signal emitter resistance r.sub.e (resistance of the forward biased base-emitter junction), current gain .beta. (the ratio of collector current change to a change of base current) and the Early voltage V.sub.A (an imaginary voltage useful in defining an increase in collector current which occurs as the collector-emitter voltage is increased).
The emitter resistance r.sub.e modifies the differential amplifier's approximate gain expression because, in each of the transistors 22, 23, this resistance is in series with that transistors' external source resistor (24 or 25). Changes in current gain .beta. (e.g., because of temperature movement) cause current variations across load resistors which results in altered amplifier gain. The Early voltage is associated with collector current changes that result when the base width is modulated by variations in the collector-emitter voltage. These collector current variations cause undesirable changes in the amplifier gain.
All transistor parameters are sensitive to changes in operating conditions, e.g., temperature, bias current and supply voltage. Their values also vary across transistor production lots. Therefore, the differential amplifier 20 finds its most effective use in circuits that can accommodate significant changes in the approximate gain expression of R.sub.C / R.sub.E. In applications that demand a more stable and accurate gain, the differential gain can be accurately set by the use of negative feedback, e.g., by the addition of feedback resistors 36 and 38 as shown in broken lines in the differential amplifier 40 of FIG. 1B. However, negative feedback generally requires the addition of frequency compensation circuits to achieve closed-loop stability. As a result, the amplifier's gain bandwidth is reduced. Therefore, closed-loop amplifiers are not an attractive option in circuits that operate at the highest attainable speed.
An example of such a circuit is a residue amplifier that is typically used in subranging analog-to-digital (A/D) converters. These converters are among the fastest of all A/D converters and are used in a variety of high-speed data acquisition systems, e.g., television video digitizing, medical imaging and radar detection. The residue amplifier responds to the difference between the converter's analog input and the output of a coarse-bit quantizer wherein the quantizer output is first modified by a reconstruction D/A converter. The amplified difference is fed to a fine-bit quantizer and the output of both quantizers is combined to form the A/D converter's digital code.
A large bandwidth in the residue amplifier is essential for realizing superior A/D resolution and high conversion speed. At the same time, stable and accurate gain of the residue amplifier is required to avoid conversion errors due to mismatching between the difference signal range and the range of the fine-bit quantizer.
Exemplary subranging A/D converters are described in the following references: William T. Colleran et al., "A 10-b, 75 MHz Two-Stage Pipelined Bipolar A/D Converter", IEEE Journal of Solid-State Circuits, Vol. 28, No. 12, December, 1993, pp. 1187-1199 and Takahiro Miki, et al., "A 10-b, 50 MS/s, 500-mW A/D Converter Using a Differential-Voltage Subconverter", IEEE Journal of Solid-State Circuits, Vol. 29, No. 4, April, 1994, pp. 516-521. No attempt has been made in the former reference to stabilize the gain of its residue amplifier. In the latter reference, on-chip replica circuits are used with external control amplifiers to force a match between the difference signal range and the range of the fine-bit quantizer.
An exemplary differential subtractor (residue amplifier) for use in a two-step parallel A/D converter (subranging A/D converter) is described in U.S. Pat. No. 5,313,207. This subtractor is arranged to limit the difference in emitter currents of a differential pair and to maintain substantially equal base-emitter voltages in the differential pair. However, this structure is still vulnerable to the gain-modifying effects discussed above.